Present day integrated semiconductor circuits may be designed to operate at one of a variety of power supply voltage levels. In addition to the once-standard 5 V supply, integrated circuits are now commonly designed for lower supply voltages between 3.3 V and 3.6 V, and the push for lower supply levels continues; as geometries have been scaled down to create smaller, denser circuits, lower supply voltages have become necessary to avoid voltage breakdown in the smaller devices. Lower supply voltages have also become desirable for microprocessor circuits in order to minimize power consumption for battery operated portable computers.
Off-chip driver circuits are commonly used to allow such integrated circuits operating at different power supply voltage levels to communicate with each other. Problems encountered by output drivers and addressed by various prior art circuits have included: excessive voltage stress on thin oxide layers of some of the driver devices, and undesirable current leakage paths causing high power dissipation and at times, CMOS latchup problems.
One such prior art driver circuit is taught by U.S. Pat. No. 5,151,619, of common assignee, entitled "CMOS Off Chip Driver Circuit" which is incorporated by reference herein. For convenience, the schematic of the '619 off-chip driver circuit is reproduced in FIG. 1. The prior art circuit operates in an active (driving) mode or a high-impedance (receiving) mode. In the active mode, initiated by causing both inputs to have the same polarity (i.e. both high or both low), the circuit drives either a CMOS low (0 V) to a CMOS high (3.3 to 3.6 V) output voltage transition or a high to low output voltage transition. In the high-impedance mode, initiated by causing one input to be low while the other is high, the driver looks like a high impedance to the next circuit stage which is normally powered by a higher voltage supply (i.e. 5 V). The thrust of the prior art circuit is to protect the transistors within the driver from high oxide gate stress and, when in high impedance mode, to prevent leakage current from flowing from the higher supply voltage (5 V) into Vdd (3.3 to 3.6 V).
While the '619 circuit meets its stated objectives, it has shortcomings which prevent it from being used in higher-speed and lower power applications. The shortcomings, which are discussed in further detail below, are: 1) the operating speed of the driver in active mode is limited by excessive delay in the high-to-low output voltage transition; and 2) a large feedthrough current runs between Vdd and ground in active mode, inducing noise problems and increasing power dissipation.
What is needed is an output driver which maintains the advantages of the prior art driver while improving the response time, noise performance and reducing power dissipation.